Lampu Lalulintas Menggunakan FPGA

Ajitama, Dhucha and , Fajar Junaedi, M.Si and , Dedi Ari Prasetya,ST (2015) Lampu Lalulintas Menggunakan FPGA. Skripsi thesis, Universitas Muhammadiyah Surakarta.

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	PDF (HALAMAN DEPAN) coverTRAFFIC LIGHT BASED ON VHSIC HIGH DESCRIPTION LANGUAGE.pdf Download (851kB)
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Abstract

In this study made a simulation of traffic lights by using a FPGA module. Traffic lights are to regulate traffic lights installed at the intersection of highways is useful to regulate road users, in order to run according to the rules and not a traffic accident. Traffic lights will be connected using IDC 40 pin cable to the GP I / O. Simulations were designed in this study using two types that exist in the FPGA. The design simulation using VHDL language, then updated to the Function Block Diagram (BDF). BDF used as a top-level Entity or as the center of the whole system. BDF consist of 2, namely: a traffic light system (traffic) and system clock devider (clk_div). Traffic light system has two types that could run in the BDF, the traffic light system 2-way crossing pedestrians using the button (type 1) and 4-way type using buttons pedestrian crossings (type 2). Traffic light system type 1 has 8 pieces of state. Then the lights started from the North-South direction is green for 5 seconds, then to yellow for 1 second, afterwards became all red for 1 second and then will move to the West-East into a green light. When the pedestrian button is pressed, the pedestrian light is green for 6 seconds and the main road to red lights all. Pedestrian lights made longer useful to anticipate pedestrians crossing or crossing diagonally. The traffic light type 2 will begin with a traffic light next to the North colored green for 5 seconds, then to yellow for 1 second, after it became red for 1 second and move to the hand of the West with the provisions of the same time and rotating clockwise. Transfer traffic light system is controlled by the displacement function keys consisting of: d, d1, and clr. The system clock divider is useful for controlling the switching time from one to the other state. Traffic lights get a clock of 5.7220 Hz.

Item Type:	Karya ilmiah (Skripsi)
Uncontrolled Keywords:	FPGA VHDL, traffic light, BDF
Subjects:	T Technology > TK Electrical engineering. Electronics Nuclear engineering
Divisions:	Fakultas Teknik > Teknik Elektro
Depositing User:	Unnamed user with username d400112002
Date Deposited:	02 Nov 2015 11:23
Last Modified:	12 Oct 2021 06:52
URI:	http://eprints.ums.ac.id/id/eprint/38472

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